異質整合（Heterogeneous Integration）

定義上是透過 2.5D 及 3D 等多維度空間設計，將多個不同性質的電子元件整合進單系統級封裝中（System in Package, SiP），不像過去傳統封裝是個別的晶粒而成單一功能的IC，當「異質整合」成為產業技術的主流趨勢，封裝範圍已不僅限個別晶粒（Die），還包括微機電系統（MEMS）、被動元件、獨立晶片及多項電子系統，成品為一個具有多功能高階晶片。

The rise of Heterogeneous Integration

Fueling this evolution is the paradox that data is growing exponentially while classic Moore’s Law scaling is slowing. We can no longer count on exponential increases in transistor density and speed and like reductions in area/cost. As a result, designers are finding it harder to place all of the transistors they need for high-performance computing, machine learning and inferencing on a single die. As an alternative approach, system designers are seeing the potential to use multi-die advanced packages instead of individually packaged die on a PCB, enabling high-performance logic and memory to be put in closer proximity to reduce latency and power consumption. In short: today, packaging is about more than just protection.

半導體異質整合先進製程材料(Heterogeneous Integration)：

晶化產品: 透明封裝材料、雷射解膠膜(Laser De-bond Film)、黏晶膜 (Die Attached Film)

自 2018年起，晶化公司陸續和國內半導體大廠共同開發3D IC封裝用關鍵材料，在竹南科學園區建設半導體先進製程材料的生產基地，現已有多項產品通過驗證。